Vhdl
Description:
New edition of a text that covers the VHDL language as well as design methodology. Topics include behavioral modeling, sequential processing, data types, subprograms and packages, VHDL synthesis, top-level system design, CPU design, and VITAL simulations. Appends an IEEE 1164 standard logic package, reference tables, and VHDL93 updates. The CD-ROM includes an evaluation copy of ModelSim. Annotation c. by Book News, Inc., Portland, Or.
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