Integrated circuit densities and operating speeds continue to rise at an exponential rate. Chips, however, cannot get larger and faster without a sharp decrease in power consumption beyond the current levels. Minimization of power consumption in VLSI chips has thus become an important design objective. In fact, with the explosive growth in demand for portable electronics and the usual push toward more complex functionality and higher performance, power consumption has in many cases become the limiting factor in satisfying the market demand.  A new generation of power-conscious CAD tools are coming onto the market to help designers estimate, optimize and verify power consumption levels at most stages of the IC design process. These tools are especially prevalent at the register-transfer level and below. There is a great need for similar tools and capabilities at the behavioral and system levels of the design process. Many researchers and CAD tool developers are working on high-level power modeling and estimation, as well as power-constrained high-level synthesis and optimization. Techniques and tools alone are, however, insufficient to optimize VLSI circuit power dissipation - a consistent and convergent design methodology is also required.  Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods was written to address some of the key problems in power analysis and optimization early in the design process. In particular, this book focuses on power macro-modeling based on regression analysis and power minimization through behavioral transformations, scheduling, resource assignment and hardware/software partitioning and mapping. What differentiates this book from other published work on the subject is the mathematical basis and formalism behind the algorithms and the optimality of these algorithms subject to the stated assumptions.  From the Foreword:  `This book makes an important contribution to the field of system design technologies by presenting a set of algorithms with guaranteed optimality properties, that can be readily applied to system-level design. This contribution is timely, because it fills the need of new methods for a new design tool generation, which supports the design of electronic systems with even more demanding requirements'.  Giovanni De Micheli, Professor, Stanford University

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods

Computers & Technology

Pedram, Massoud

Chang, Jui-Ming

Graphics & Design

Springer

Power Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion of techniques and methodologies for improving the power efficiency of CMOS circuits (digital and analog), systems on chip, microelectronic systems, wirelessly networked systems of computational nodes and so on. In addition to providing an in-depth analysis of the sources of power dissipation in VLSI circuits and systems and the technology and design trends, this book provides a myriad of state-of-the-art approaches to power optimization and control. The different chapters of Power Aware Design Methodologies have been written by leading researchers and experts in their respective areas. Contributions are from both academia and industry. The contributors have reported the various technologies, methodologies, and techniques in such a way that they are understandable and useful.

Power Aware Design Methodologies

Rabaey, Jan M.

Programming

Integrated circuit densities and operating speeds continue to  rise at an exponential rate. Chips, however, cannot get larger and  faster without a sharp decrease in power consumption beyond the  current levels. Minimization of power consumption in VLSI chips has  thus become an important design objective. In fact, with the explosive  growth in demand for portable electronics and the usual push toward  more complex functionality and higher performance, power consumption  has in many cases become the limiting factor in satisfying the market  demand.   A new generation of power-conscious CAD tools are coming onto the  market to help designers estimate, optimize and verify power  consumption levels at most stages of the IC design process. These  tools are especially prevalent at the register-transfer level and  below. There is a great need for similar tools and capabilities at the  behavioral and system levels of the design process. Many researchers  and CAD tool developers are working on high-level power modeling and  estimation, as well as power-constrained high-level synthesis and  optimization. Techniques and tools alone are, however, insufficient to  optimize VLSI circuit power dissipation - a consistent and  convergent design methodology is also required.   Power Optimization and Synthesis at Behavioral and System Levels  Using Formal Methods was written to address some of the key  problems in power analysis and optimization early in the design  process. In particular, this book focuses on power macro-modeling  based on regression analysis and power minimization through behavioral  transformations, scheduling, resource assignment and hardware/software  partitioning and mapping. What differentiates this book from other  published work on the subject is the mathematical basis and formalism  behind the algorithms and the optimality of these algorithms subject  to the stated assumptions.   From the Foreword:   `This book makes an important contribution to the field of system  design technologies by presenting a set of algorithms with guaranteed  optimality properties, that can be readily applied to system-level  design. This contribution is timely, because it fills the need of new  methods for a new design tool generation, which supports the design of  electronic systems with even more demanding requirements'.   Giovanni De Micheli, Professor, Stanford University

Power Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion of techniques and methodologies for improving the power efficiency of CMOS circuits (digital and analog), systems on chip, microelectronic systems, wirelessly networked systems of computational nodes and so on. In addition to providing an in-depth analysis of the sources of power dissipation in VLSI circuits and systems and the technology and design trends, this book provides a myriad of state-of-the-art approaches to power optimization and control. The different chapters of Power Aware Design Methodologies have been written by leading researchers and experts in their respective areas. Contributions are from both academia and industry. The contributors have reported the various technologies, methodologies, and techniques in such a way that they are understandable and useful.

See the best price to sell, buy, or rent books by Pedram, Massoud. BookScouter helps to compare book prices from 25+ online bookstores and 30+ buyback vendors with a single search.

Books by Pedram, Massoud

See the best price to sell, buy, or rent books by Pedram, Massoud. BookScouter helps to compare book prices from 25+ online bookstores and 30+ buyback vendors with a single search.

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods

Power Aware Design Methodologies

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods

Power Aware Design Methodologies